integrated circuit systems, inc. general description features av9107c-17 block diagram cpu frequency generator applications computer: the av9107c-17 is the ideal solution for replacing high speed oscillators and for reducing clock speeds to save power in computers. the device provides smooth, glitch-free frequency transitions so that the cpu can continue to operate during slow down or speed up. the rate of frequency change makes the av9107c-17 compatible with all 386dx, 386sx, 486dx, 486dx2, and 486sx devices. av 9107 -17 revc052197p t he av9107c-17 offers a tiny footprint solution for generating two simultaneous clocks. one clock, the refclk, is a fixed output frequency which is the same as the input reference crystal (or clock). the other clock, clk1, can vary between 25.06 and 33.29 mhz. the device has advanced features which include on-chip loop filters, tristate outputs, and power-down capability. a mini-mum of external components - two decoupling capacitors and an optional ferrite bead - are all that are required for jitter-free operation. patented on-chip phase-locked loop with vco for clock generation provides reference clock and synthesized clock generates frequencies of 25 and 33 mhz 8-pin dip or soic package 14.318 mhz input reference frequency on-chip loop filter low power cmos technology single +3.3 or +5 volt power supply ? ? ? ? ? ? ? ?
2 av9107c-17 pin descriptions pin configuration 8-pin dip, soic functionality (at 14.318) mhz reference frequency input) frequency transitions a key av9107c-17 feature is the ability to provide glitch- free frequency transitions between its output frequencies. output enable the output enable feature tristates the specified output clock pins. this places the selected output pin in a high impedance state to allow for system level diagnostic testing. absolute maximum ratings avdd, vdd referenced to gnd . . . . . . . . . . . . . . . 7v operating temperature under bias. . . . . . . . . . . . . . . . 0c to +70c storage temperature . . . . . . . . . . . . . . . . . . . . . . . . . . -65c to +150c voltage on i/o pins referenced to gnd. . . . . . . . . . . gnd -0.5v to vdd +0.5v power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 watts stresses above those listed under absolute maximum ratings may cause permanent damage to the de vice. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect product reliability. fs clk1 0 1 25.06 mhz 33.29 mhz pin number pin name type description 1 fs0 input frequency select 0 for clk1. 2 gnd - digital ground. 3 x1/iclk input crystal output or input clock frequency. typically 14.318 mhz system clock. 4 x2 output crystal output (no connect when clock used.). 5 oe input output enable. tristates clk1 and refclk when low. has internal pull-up. 6 clk1 output clock 1 output (see decoding tables). 7 vdd - digital power supply (+5v dc). 8 refclk output reference clock output. produces a buffered version of the input clock or crystal frequency (typically 14.318 mhz).
3 av9107c-17 note 1: parameter is guaranteed by design and characterization. not 100% tested in production. electrical characteristics at 5.0v operating v dd = +4.5v to +5.5v; t a =0c to 70c unless otherwise stated dc characteristics parameter symbol test conditions min typ max units input low voltage v il --0.8v input high voltage v ih 2.0 - - v input low current i il v in =0v (pull-up input) - 6.0 16.0 a input low current i il v in =0v (input with no pull-up) -2.0 2.0 a input high current i ih v in =v dd -2.0 - 2.0 a output low voltage, note 1 v ol i ol =10ma - 0.15 0.40 v output high voltage, note 1 v oh i oh =-30ma 2.4 3.25 - v output low current, note 1 i ol v ol =0.8v 22.0 35.0 - ma output high current, note 1 i oh v oh =2.0v - -50.0 -35.0 ma supply current i dd unload, 50 mhz - 18.0 42.0 ma supply current; power-down (-03 only) i dd (pd low) unload, logic inputs 000 - 38.0 100.0 a supply current; power-down (-03 only) i dd (pd low) unload, logic inputs 111 - 14.0 40.0 a supply current; slow clock (-11 only) i dd (slow clock low) unloaded, slow clock pin low - 5.5 9.0 a pull-up resistor, note 1 r pu - 380.0 700.0 k ohms ac characteristics rise time 0.8 to 2.0v, note 1 t r 15pf load - 0.60 1.40 ns fall time 2.0 to 0.8v, note 1 t f 15pf load - 0.40 1.00 ns rise time 20% to 80%, note 1 t r 15pf load - 2.0 3.5 ns fall time 80% to 20%, note 1 t f 15pf load - 1.0 2.5 ns duty cycle, note 1 d t 15pf load @1.4v 45.0 50.0 55.0 % jitter, one sigma, note 1 t jis from 20 to 100 mhz - 50.0 150.0 ps jitter, one sigma, note 1 t jis from 14 to 16 mhz 100.0 200.0 ps jitter, one sigma, note 1 t jis from 14 to below 0.2 1.0 % jitter, absolute, note 1 t jab from 20 to 100 mhz -250.0 250.0 ps jitter, absolute, note 1 t jab from 14 to 16 mhz -500.0 500.0 ps jitter, absolute, note 1 t jab from 14 to below 1.0 3.0 % input frequency, note 1 f i 11.0 14.3 19.0 mhz output frequency f o 2.0 - 120.0 mhz power-up time, note 1 t pu - 7.58 18.0 ms transition time, note 1 t ft 25 to 33.3 mhz - 6.0 13.0 ms
4 av9107c-17 electrical characteristics at 3.3v note 1: parameter is guaranteed by design and characterization. not 100% tested in production. operating v dd = +3.0v to +3.7v; t a =0c to 70c unless otherwise stated dc characteristics parameter symbol test conditions min typ max units input low voltage v il - - 0.20v dd v input high voltage v ih 0.7vdd - - v input low current i il v in =0v (pull-up input) - 2.5 7.0 a input low current i il v in =0v (input with no pull-up) -2.0 2.0 a input high current i ih v in =v dd -2.0 - 2.0 a output low voltage, note 1 v ol i ol =6ma - 0.15 0.1 v output high voltage, note 1 v oh i oh =-5ma 0.85 0.92 - v output low current, note 1 i ol v ol =0.2v dd 15.0 22.0 - ma output high current, note 1 i oh v ol =0.7v dd - -17.0 -10.0 ma supply current i dd unloaded, 50 mhz - 22.0 40.0 ma supply current; power-down (-03 only) i dd (pd low) unload, logic inputs 000 - 13.0 40.0 a supply current; power-down (-03 only) i dd (pd low) unload, logic inputs 111 - 4.0 12.0 a supply current; slow clock (-11 only) i dd (slow clock low) unloaded, slow clock pin low - 3.5 6.0 ma pull-up resistor rpu - 550.0 900.0 k ohms ac characteristics rise time 20% to 80%, note 1 t r 15pf load - 2.2 3.5 ns fall time 80% to 20%, note 1 t f 15pf load - 1.2 2.5 ns duty cycle, note 1 d t 15pf load @ 50% 40.0 46.0 53.0 % jitter, one sigma, note 1 t jis from 25 to 66 mhz - 50.0 150.0 ps jitter, one sigma, note 1 t jis from 14 to 20 mhz 100.0 200.0 ps jitter, one sigma, note 1 t jis from 14 to below 0.4 1.0 % jitter, absolute, note 1 t jab from 25 to 66 mhz -250.0 250.0 ps jitter, absolute, note 1 t jab from 14 to 20 mhz -500.0 500. ps jitter, absolute, note 1 t jab from 14 to below 1.0 3.0 % input frequency, note 1 f i 13.3 14.3 15.3 mhz output frequency, note 1 f o 2.0 - 66.6 mhz power-up time, note 1 t pu - 7.58 18.0 ms transition time, note 1 t ft 25 to 33.3 mhz - 6.0 13.0 ms
5 av9107c-17 ordering information AV9107C-17CN08 or av9107c-17cs08 example: xxx xxxx-ppp m x#w 8-pin plastic soic package lead count & package width lead count=1, 2 or 3 digits w=.3 soic or .6 dip; none=standard width package type n=dip ( plastic) s=soic pattern number (2 or 3 digit number for parts with rom code patterns, if applicable) device type (consists of 3 or 4 digit numbers) prefix ics, av=standard device; gsp=genlock device 8-pin dip package
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